For optimization of form factor, performance, and manufacturing cost, it is often desirable to integrate components of a power circuit, such as a half-bridge based DC-DC converter or a voltage converter, in a single semiconductor package. Thus, several semiconductor package designs have been developed to integrate the power transistors of a power circuit within a compact package. To provide sufficient electrical performance for the reliable operation of high power semiconductor packages, it is crucial to ensure high current carrying capability and low resistance for connection between the transistors of the power circuit.
Various high power semiconductor package designs use multiple leadframes, including leadframes for connecting conductive clips to a substrate, undesirably increasing electrical resistance and reducing current carrying capability. Additionally, package design rules to successfully accommodate multiple leadframes and a conductive clip require a large degree of tolerance (i.e. a large clearance space) for manufacturing, thus undesirably increasing package form factor and complexity. For example, package height and width have to be increased to provide sufficient space for the multiple leadframes and a conductive clip, and additional area on the package may be reserved for necessary electrical connections. Additionally, the increased package complexity resulting from the use of multiple leadframes and a conductive clip may negatively affect manufacturing time, cost, and package yields.